The present invention relates to a method of fabricating an integrated circuit including complementary high voltage semiconductor devices and, more particularly, to such method wherein the high voltage semiconductor devices are of the dielectrically-isolated type.
Various electrical circuits could benefit from the economy and simplicity of utilizing an integrated circuit that includes complementary, high voltage semiconductor devices. This is true, for example, for alternating current switches, push-pull drives, or half-bridge circuits.
The use of dielectric material to isolate the complementary semiconductor devices from each other and from a substrate of an integrated circuit is appealing, since this arrangement prevents parasitic device-to-device current and parasitic device-to-substrate current. Two types of devices which incorporate dielectric material to achieve the desired isolation are known in the art as dielectric isolation (DI) and silicon-on-insulation (SOI) devices. A key feature of these types of devices is that each includes respective insulating tubs situated on a substrate, each tub containing epitaxially-grown semiconductor material constituting the semiconductor body of one of the complementary semiconductor devices.
The fabrication of a semiconductor device requires accurate control of the dopant levels in a voltage-supporting region of the device. This is necessary to enable the device to block current at high voltage. Such accurate doping control is difficult to attain while epitaxially growing semiconductor material in the insulating tubs of DI and SOI devices. Thus, device yields (i.e., successful devices of a manufacturing batch) would expectedly be low.
It would thus be desirable to provide a method of fabricating an integrated circuit with complementary, dielectrically-isolated, semiconductor devices capable of blocking current at high voltage.